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Hardware-in-the-loop simulation of PV systems in micro-grids using SysML models

Abstract : This paper outlines a methodology for modeling photovoltaic systems in embedded hardware. This methodology uses the HiLeS platform to transform SysML models in Petri nets and generate VHDL code. The proposed methodology is intended for Hardware-in-the-Loop simulations of power converters and PV panels in microgrids. In addition, this methodology allows the design of MPPT controllers for their direct implementation in FPGA
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https://hal.laas.fr/hal-01963537
Contributor : Corinne Alonso <>
Submitted on : Sunday, December 30, 2018 - 9:04:30 PM
Last modification on : Thursday, June 10, 2021 - 3:05:49 AM
Long-term archiving on: : Sunday, March 31, 2019 - 1:35:22 PM

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A. Gutierrez, Harold Chamorro, J. Jimenez, Luiz Fernando Lavado Villa, Corinne Alonso. Hardware-in-the-loop simulation of PV systems in micro-grids using SysML models. IEEE 16th Workshop on Control and Modeling for Power Electronics (COMPEL 2015), IEEE, Jul 2015, Vancouver, Canada. ⟨10.1109/COMPEL.2015.7236466⟩. ⟨hal-01963537⟩

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