Hardware-in-the-loop simulation of PV systems in micro-grids using SysML models

This paper outlines a methodology for modeling photovoltaic systems in embedded hardware. This methodology uses the HiLeS platform to transform SysML models in Petri nets and generate VHDL code. The proposed methodology is intended for Hardware-in-the-Loop simulations of power converters and PV panels in microgrids. In addition, this methodology allows the design of MPPT controllers for their direct implementation in FPGA

Mots clés

MPPT Boost converter Petri net SysML FPGA Hardware-in-the-Loop Photovoltaic Index Terms-Photovoltaic

Domaines

Sciences de l'ingénieur [physics] Energie électrique

Fichier principal

2015_Hardware-in-the-Loop_Simulation_of_PV_Systems_in_Microgrids_Usign_SysML (1).pdf (1.64 Mo)

Origine : Fichiers produits par l'(les) auteur(s)

Corinne Alonso : Connectez-vous pour contacter le contributeur

https://laas.hal.science/hal-01963537

Soumis le : dimanche 30 décembre 2018-21:04:30

Dernière modification le : lundi 20 novembre 2023-11:44:21

Archivage à long terme le : dimanche 31 mars 2019-13:35:22

Dates et versions

hal-01963537 , version 1 (30-12-2018)

Identifiants

HAL Id : hal-01963537 , version 1
DOI : 10.1109/COMPEL.2015.7236466

Citer

A. Gutierrez, Harold Chamorro, J. Jimenez, Luiz Fernando Lavado Villa, Corinne Alonso. Hardware-in-the-loop simulation of PV systems in micro-grids using SysML models. IEEE 16th Workshop on Control and Modeling for Power Electronics (COMPEL 2015), IEEE, Jul 2015, Vancouver, Canada. ⟨10.1109/COMPEL.2015.7236466⟩. ⟨hal-01963537⟩

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