SysML methodology for HIL implementation of PV models

Abstract : This paper describes a methodology for implementing in FPGA models of photovoltaic panels for Hardware-in-the-Loop (HIL) and real-time simulations. The proposed methodology integrates numerical solutions, SysML diagrams and Petri nets for structural design and formal validation. In this study, photovoltaic cells have been modeled using the single diode circuit. The photovoltaic panel model is solved by the Newton-Raphson method, and the Lagrange remainder is employed to limit the iteration number. Results show suitable accuracy and performance of the proposed methodology.
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Communication dans un congrès
Power Electronics and Applications (EPE'15 ECCE-Europe), Sep 2015, Geneva, Switzerland. Power Electronics and Applications (EPE'15 ECCE-Europe), 2015, 〈10.1109/EPE.2015.7309196〉
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https://hal.laas.fr/hal-01963557
Contributeur : Corinne Alonso <>
Soumis le : lundi 31 décembre 2018 - 12:13:50
Dernière modification le : mercredi 16 janvier 2019 - 15:56:26

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A. Gutierrez, H. Chamorro, Luis Ferando Lavado Villa, J. Jimenez, Corinne Alonso. SysML methodology for HIL implementation of PV models. Power Electronics and Applications (EPE'15 ECCE-Europe), Sep 2015, Geneva, Switzerland. Power Electronics and Applications (EPE'15 ECCE-Europe), 2015, 〈10.1109/EPE.2015.7309196〉. 〈hal-01963557〉

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