Optimization of the elaboration of insulating layers for the gate structures and the passivation of MIS-HEMT transistors on GaN

Abstract : With its large band gap, Gallium Nitride (GaN) semiconductor is one of the most promising materials for new power devices generation thanks to its outstanding material properties for high voltage, temperature and frequency applications. The main objective of this thesis was the development and optimization of the insulating step taking place in the elaboration of MIS-HEMT transistors on an AlGaN/GaN heterstroctructure. In order to reduce gate leakage currents without degrading the device properties, alumina Al2O3 deposited by ALD was chosen as a gate dielectric. The study was first centered on the influence of surface treatments, chemical or plasma, regarding surface contamination. Their impact was analyzed through XPS and AFM. Secondly, electrical measures were performed on complete MIS-HEMT diodes and transistors to evaluate the influence of the alumina insulating layer depending on the ALD deposition method. Lastly, partial and full recess of the AlGaN barrier was studied via ICP-RIE etching. The gate dielectric deposition is one of the crucial steps intervening in the HEMT creation process. The quality and control at the Al2O2/AlGaN interface being paramount, it will directly influence the device's electric properties. This involves control ing the semiconductor surface, but also the nature and deposition technique of the dielectric. As such, an ammonia-based treatment at high temperature appears to be the most efficient in reducing native oxygen contamination. Regarding electric performances, C(V) and Id(Vg) measures showed the superiority of PEALD compared to traditional thermal ALD deposition. This can be explained by the fact that the oxygen plasma used as oxydant during the alumina deposition by PEALD seems to clean the surface during the first cycles, mostly by reducing carbon contamination. This allowed to achieve a better interface between the semiconductor and the insulting layer, thus limiting traps at the interface or in the oxyde. This allows to considerably reduce gate leakage currents, without degrading the quality and transition sharpness between the on and off state. Moreover, the realized HEMTs being normally-off, gate recess etching via ICP-RIE was implemented in order to make the threshold voltage less negative. This was successfully achieved, especially through the realization of a normally-off transistors thanks to a full recess of the AlGaN barrier under the gate. State of the art results were achieved through a simple approach, and a robust and highly reproducible transistor elaboration process, with great reduction of gate leakage currents and a record sub-threshold slope. In order to complete the study, it will be necessary in the future to proceed to viability studies, especially through dynamic electric evaluation, in order to evaluate for instance Ron degradation phenomenons.
Document type :
Electronics. Université Paul Sabatier - Toulouse III, 2016. English. 〈NNT : 2016TOU30150〉
Liste complète des métadonnées

Cited literature [44 references]  Display  Hide  Download

Contributor : Arlette Evrard <>
Submitted on : Tuesday, October 4, 2016 - 10:00:55 AM
Last modification on : Thursday, January 11, 2018 - 6:14:52 AM
Document(s) archivé(s) le : Thursday, January 5, 2017 - 12:56:53 PM


  • HAL Id : tel-01376016, version 1


Richard Meunier. Optimization of the elaboration of insulating layers for the gate structures and the passivation of MIS-HEMT transistors on GaN. Electronics. Université Paul Sabatier - Toulouse III, 2016. English. 〈NNT : 2016TOU30150〉. 〈tel-01376016〉



Record views


Files downloads