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Mots clés

Hardware Countermeasure Variance-based Power Attack VPA Simulation Electromagnetic Side-Channel Attacks Protocols Elliptic curve cryptography STT-MRAM Coq Transistors DRAM Switches Power-constant logic Defect modeling Masking countermeasure SCA Application-specific VLSI designs Hardware security SoC ASIC Formal methods OCaml Steadiness Temperature sensors Reliability Aging Formal proof Process variation Robustness Loop PUF CPA Internet of Things Circuit faults Dual-rail with Precharge Logic DPL Cryptography Fault injection Power demand Security and privacy Voltage Receivers Intrusion detection TRNG Side-channel attack Asynchronous Authentication Differential Power Analysis DPA RSA 3G mobile communication Masking Reverse-engineering Sensors Side-channel attacks SCA Countermeasures MRAM Linearity AES Estimation FDSOI Training GSM CRT Routing Side-Channel Analysis SCA Dynamic range FPGA Confusion coefficient Magnetic tunnel junction Logic gates Neural networks Convolution PUF Sécurité Image processing Randomness Machine learning Side-Channel Analysis Energy consumption Tunneling magnetoresistance Filtering Magnetic tunneling Security Costs Information leakage Side-channel attacks Security services Differential power analysis DPA Side-channel analysis Random access memory Resistance Lightweight cryptography Field Programmable Gates Array FPGA Writing Spin transfer torque Mutual Information Analysis MIA Computational modeling Fault injection attack Reverse engineering Field programmable gate arrays Signal processing algorithms

 

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211

Références bibliographiques

428

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39 %

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